Site US_UChicago
Site name | US_UChicago | |
Jobsub site name | UChicago | |
WLCG site name | MWT2 | |
Region | North_America | |
Seen in OSG config | 2024-09-29 05:14:22 | |
Enabled? | True | |
Last submitted | 2024-09-28 19:39:29 | |
Last job started | 2024-09-29 05:17:18 | |
Last AWT job | 2024-09-28 19:48:03 | |
Always has inner apptainer | True | |
Stage Ranks | At 2024-09-29 05:15:25, [w2437s1=80.50 w2449s1=80.50 w2760s1=80.50 w2761s1=80.50 w2762s1=80.50 w2764s1=80.50 w2964s1=80.50 w2965s1=80.50 w2966s1=80.50 w3135s1=80.50 w3136s1=80.50 w3137s1=80.50 w3188s1=80.50 w3189s1=80.50 w3190s1=80.50 w3208s1=80.50 w3209s1=80.50 w3211s1=80.50 w3259s1=80.50 w3261s1=80.50 w3271s1=80.50 w3273s1=80.50 w3284s1=80.50 w3286s1=80.50 w3294s1=80.50 w3296s1=80.50 w3303s1=80.50 w3305s1=80.50 w3526s1=80.50 w3527s1=80.50] | |
Jobs | All Submitted Started Processing Outputting Finished Notused Aborted Stalled Jobscript_error Outputting_failed AWT | |
Events | All AWT | |
External info | CRIC GitHub issues |
Entries for this site
Entry | Gatekeeper | RSS (MiB) / processors | Wall seconds limit | Always has inner apptainer | GPUs | Seen in OSG config |
---|---|---|---|---|---|---|
Engage_US_MWT2_iut2_condce | iut2-gk.mwt2.org | 16000 / 8 = 2000 | 82080 (22 hours) | False | 2024-02-09 | |
Engage_US_MWT2_iut2_condce_mcore | iut2-gk.mwt2.org | 16000 / 8 = 2000 | 86400 (24 hours) | True | False | 2024-09-29 |
Engage_US_MWT2_iut2_gk02_condce | iut2-gk02.mwt2.org | 16000 / 8 = 2000 | 82080 (22 hours) | False | 2024-02-09 | |
Engage_US_MWT2_iut2_gk02_condce_mcore | iut2-gk02.mwt2.org | 16000 / 8 = 2000 | 86400 (24 hours) | True | False | 2024-09-29 |
Engage_US_MWT2_uct2_condce | uct2-gk.mwt2.org | 16000 / 8 = 2000 | 82080 (22 hours) | False | 2024-02-09 | |
Engage_US_MWT2_uct2_condce_mcore | uct2-gk.mwt2.org | 16000 / 8 = 2000 | 86400 (24 hours) | True | False | 2024-09-29 |
Engage_US_MWT2_uct2_gk02_condce | uct2-gk02.mwt2.org | 16000 / 8 = 2000 | 82080 (22 hours) | False | 2024-02-09 | |
Engage_US_MWT2_uct2_gk02_condce_mcore | uct2-gk02.mwt2.org | 16000 / 8 = 2000 | 86400 (24 hours) | True | False | 2024-09-29 |
Engage_US_MWT2_uiuc_condce | uiuc-gk.mwt2.org | 16000 / 8 = 2000 | 82080 (22 hours) | False | 2024-02-09 | |
Engage_US_MWT2_uiuc_condce_mcore | uiuc-gk.mwt2.org | 16000 / 8 = 2000 | 86400 (24 hours) | True | False | 2024-09-29 |
Engage_US_MWT2_uiuc_gk02_condce | uiuc-gk02.mwt2.org | 16000 / 8 = 2000 | 82080 (22 hours) | False | 2024-02-09 | |
Engage_US_MWT2_uiuc_gk02_condce_mcore | uiuc-gk02.mwt2.org | 16000 / 8 = 2000 | 86400 (24 hours) | True | False | 2024-09-29 |
Storages by distance
Values are xrdcp read and rucio upload exit codes for jobs contacting each RSE. 0 = success. Decommissioned storages are not listed.
RSE name | Distance | Occupancy | Read | Write | Read test | Write test | Events |
---|---|---|---|---|---|---|---|
MONTECARLO | 0 | 1.00 | True | False | All AWT | ||
DUNE_US_BNL_SDCC | 20 | 0.91 | True | True | 0 | 99 | All AWT |
DUNE_US_FNAL_DISK_STAGE | 20 | 0.74 | True | True | 0 | 0 | All AWT |
FNAL_DCACHE | 20 | 0.00 | True | False | All AWT | ||
FNAL_DCACHE_STAGING | 20 | 0.00 | True | False | All AWT | ||
FNAL_DCACHE_TEST | 20 | 0.00 | False | False | All AWT | ||
T3_US_NERSC | 20 | 0.06 | True | False | All AWT | ||
CERN_PDUNE_EOS | 90 | 0.47 | True | False | All AWT | ||
DUNE_CERN_EOS | 90 | 0.75 | True | True | 0 | 0 | All AWT |
DUNE_ES_PIC | 100 | 0.98 | True | True | 0 | 0 | All AWT |
DUNE_FR_CCIN2P3_DISK | 100 | 1.00 | True | True | 0 | 0 | All AWT |
DUNE_IN_TIFR | 100 | 5.40 | True | False | All AWT | ||
DUNE_IT_INFN_CNAF | 100 | 0.03 | True | False | All AWT | ||
DUNE_UK_GLASGOW | 100 | 0.00 | True | False | All AWT | ||
DUNE_UK_LANCASTER_CEPH | 100 | 0.66 | False | False | 0 | 0 | All AWT |
DUNE_UK_MANCHESTER_CEPH | 100 | 0.67 | True | False | All AWT | ||
MANCHESTER | 100 | 0.12 | True | False | 54 | 99 | All AWT |
NIKHEF | 100 | 0.96 | True | True | 0 | 0 | All AWT |
PRAGUE | 100 | 0.73 | True | True | 0 | 0 | All AWT |
QMUL | 100 | 0.30 | False | False | 51 | 99 | All AWT |
RAL-PP | 100 | 0.60 | True | True | 0 | 0 | All AWT |
RAL_ECHO | 100 | 0.89 | True | True | 0 | 0 | All AWT |
SURFSARA | 100 | 0.79 | True | True | 0 | 0 | All AWT |